We cooperate with ISABER to develop 4-6 inch SICOI wafers (silicon carbide on insulator wafers). The wafers use surface activated bonding technology to bond thermal oxide wafers and 4H high-purity semi-insulating silicon carbide wafers together, and then control the thickness to the thickness you need through ion implantation, annealing, thinning or direct thinning and CMP polishing. It is worth noting that ion implantation and direct CMP and thinning have their own advantages and disadvantages.
Bonding modification layer
Different from conventional hydrophilic bonding, we use Surface Actived Bonding Technology. During bonding, a modified layer is added in the middle to match the upper and lower bonding surfaces. The material of the modified layer is generally amorphous silicon/aluminum oxide/titanium oxide. For optical applications, we recommend aluminum oxide or titanium oxide. Users can choose different intermediate layers according to their needs. This bonding method can effectively avoid bubbles during the bonding process. For mass-produced products, according to our specifications, we promise a minimum of 79.8% of the available area of 6-inch wafers.
Film thickness range and accuracy
Based on SMARTCUT process
Film thickness range: 50nm-20um
Film thickness uniformity +-20nm
Based on Grinding+CMP process
Film thickness range: 200nm-any thickness
Film thickness uniformity: +-100nm:
Data support(N K Value of 4H HPSI SiC):
Refractive Index and Absorption Value of 4H HPSI Silicon Carbide.txt
Standar Specification
Grinding-CMP fabricated 6 inch SiCOI
High-purity semi-insulating 4H-SiC, on-axis, Orientation: {0001} ±0.25 deg, thickness: 1um±0.1um；
SiO2 thickness 3um，Si (100) 675+-25um
SiC C-face up, roughness Rq<0.2nm （5um*5um）after CMP
1000nm HPSI SIC on 3um SIO2 and 675um Si 2024.9.25.pdf
700nm HPSI SIC on 3um SIO2 and 675um Si 2024.9.25 (2).pdf
500nm HPSI SIC on 3um SIO2 and 675um Si 2024.9.25 (2).pdf
Test Data(as you can see in this drawing , we get a 6 inch SICOI wafer its thickness uniformity is 1um+-100nm and its average surface roughness is 0.118nm )
Smartcut fabricated 6 inch SiCOI
High-purity semi-insulating 4H-SiC, on-axis, Orientation: {0001} ±0.25 deg, thickness: 1um±0.02um (Wafer specification need to be checked before processing)
SiO2 thickness 3um
Si (100)
SiC c-face up, roughness Rq<0.2nm after CMP
SmartCut VS Direct Thining&CMP Polishing
SmartCut Process can provide excellent film thickness accuracy, but the ion implantation process will have a certain impact on the silicon carbide material, which will affect the device performance when used in optical applications.
Direct thinning and CMP polishing will not damage the material properties and can provide good device performance, but this method cannot well control the thickness accuracy of the silicon carbide layer.
OMedaSemi can provide SICOI wafer based on both Smartcut and thinning and polishing processes.
Application:
SICOI Based MEMS Sensor
See related article :
4H-Silicon_Carbide_as_an_Acoustic_Material_for_MEMS.pdf
SICOI Based Photonics Integrated Circuit
See related article :
Wafer-scale 4H-silicon carbide-on-insulator (4H–SiCOI) platform for nonlinear integrated.pdf
Nonlinear Integrated 4H-SiC-on-Insulator Platform.pdf
* Development of deep etching process based on SICOI wafer
OMeda (Shanghai Omedasemi Co.,Ltd) was founded in 2021 by 3 doctors with more than 10 years of experience in nanpfabrication. It currently has 15 employees and has rich experience in nanofabrication (coating, lithography, etching, two-photon printing, bonding) and other processes. We support nanofabrication of 4/6/8-inch wafers.
