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First Demonstration of Monolithic 3D Integrated Si PICs and BEOL Oxide Semiconductor EICs for Electronic-Photonic Compute-in-Memory (CiM)

Date: 2025-12-16 11:09:09     Hits: 2

This paper presents the first demonstration of a monolithic 3D integrated electronic-photonic compute-in-memory (EPCiM) platform, which combines oxide semiconductor (OS) electronic integrated circuits (EICs) with photonic integrated circuits (PICs). The proposed architecture uses a compact 2-transistor-1-diode (2T1D) cell, which is fabricated using a silicon photonics (SiPh) foundry and then processed in a university cleanroom. This novel system integrates both electrical-write and optical-read capabilities for efficient data processing.

Key Contributions:

  1. 2T1D EPCiM Architecture:

    • The architecture consists of two zinc oxide (ZnO) FETs as access transistors and a silicon micro-ring resonator modulator (MRM) with a PN junction as the diode.

    • This configuration allows the system to achieve ultra-low leakage current, a fast write time of 9.6 ns, and a high-speed compute-in-memory throughput of 2.4 GS/s, with optical read latency of less than 500 fs.

    • It operates with three-bit precision, resulting in a high computing density of 8.46 TOPS/mm² and a power efficiency of 4.46 TOPS/W.

  2. Monolithic 3D Integration:

    • The 2T1D EPCiM cell is monolithically stacked, with the ZnO FETs placed above the silicon waveguides, allowing seamless integration of oxide semiconductor (OS) EICs and silicon photonic (SiPh) PICs.

    • This monolithic integration eliminates the need for hybrid bonding, overcoming the limitations of interconnect delays, thermal mismatch, and alignment challenges typically associated with hybrid approaches.

  3. Experimental Validation:

    • The EPCiM platform was experimentally validated by achieving high-speed write and read operations, with 3.7× better INL and 2.1× better DNL compared to previous DOCs. The system also demonstrated a low dot-production computing error σ of 0.075 at a 2.4 GS/s rate.

    • Additionally, the system was evaluated as a tensor core in a pretrained VGG-19 convolutional neural network (CNN), achieving 90.83% accuracy on the CIFAR-10 image classification task, which confirms its practical applicability.

  4. Device Fabrication:

    • The fabrication process involved SiPh photonic integration, including the patterning of the Si PICs, deposition of ZnO FETs, and integration of the MRM. The use of ALD (Atomic Layer Deposition) for ZnO layers ensured high uniformity and scalability, and chemical mechanical polishing (CMP) was used to achieve the necessary surface quality.

  5. Performance and Power Efficiency:

    • The proposed EPCiM platform significantly outperforms conventional ECiM and PCiM platforms in terms of write speed, read speed, and computational density. The energy efficiency and high-speed performance make it an ideal candidate for future data-intensive computing applications.

Conclusion:
The work demonstrates a cutting-edge monolithic 3D integrated EPCiM architecture, combining oxide semiconductor electronics and silicon photonics for efficient, high-speed compute-in-memory applications. This approach addresses key limitations in previous ECiM and PCiM platforms and offers significant improvements in computational density, power efficiency, and speed. The successful implementation of this platform paves the way for the development of scalable, energy-efficient computing systems in future high-performance computing and machine learning applications.


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